High Strength Silicon Nitride Substrate for SiC Power Module, AMB/DBC Ready

High strength silicon nitride substrate (Si3N4) provides a stiff, low-CTE, high dielectric base for AMB/DBC copper metallization in SiC/IGBT modules, designed for thermal cycling and vibration-prone assemblies. Standard thickness 0.25–1.00 mm; panels and singles up to ~120×120 mm typical (larger on request). Custom patterns, windows, and holes are available for inverter and charger layouts.

Catalogue No. AT-DHG-JB001
Material Silicon Nitride
Thermal Conductivity  ≥90 W/m·K
Flexural Strength ≥600 MPa
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High strength silicon nitride substrate is a Si₃N₄ ceramic base plate engineered for power-electronic packaging. It combines a stiff, low-CTE ceramic core with high dielectric integrity and is typically prepared for AMB/DBC copper metallization so SiC/IGBT devices can be solder- or braze-attached and survive thermal and power cycling.

 

High Strength Silicon Nitride Substrate Benefits

  • High bending strength resists cracking under reflow and thermal cycling
    Flexural strength above 600 MPa prevents substrate fractures during soldering and −40 °C to 150 °C cycling. This reduces die attach failures and extends module service life.

  • 75–90 W/m·K thermal conductivity enables compact and cooler module design
    Efficient heat transfer lowers junction-to-case resistance and supports high power density layouts. It helps maintain safe chip temperatures in SiC and IGBT devices.

  • Dielectric strength ≥15 kV/mm supports thinner insulation and high-voltage safety
    High insulation capability allows reduced substrate thickness without compromising creepage and clearance. Suitable for 800V EV systems, PV inverters, and industrial drives.

  • Low CTE close to SiC minimizes thermal stress on copper and die interfaces
    With 2.9–3.2×10⁻⁶/K, the CTE matches semiconductor and metallization layers. This reduces solder fatigue, delamination, and warpage under rapid heating and cooling.

  • Precise flatness and thickness tolerance enhance metallization and solder bonding
    Tight control of thickness (±0.05–0.10 mm) ensures uniform copper wetting and brazing quality. It stabilizes thermal performance and reduces assembly scrap rates.

 

High Strength Silicon Nitride Substrate Properties

Si3N4 Type Gas pressure sintering Si3N4 Hot pressing sintering Si3N4 High thermal conductivity Si3N4
Density (g/cm3) 3.2 3.3 3.25
Flexture strength (MPa) 700 900 600~800
Young Modulus (GPa) 300 300 300~320
Poisson's ratio 0.25 0.28 0.25
Compressive strength (MPa) 2500 3000 2500
Hardness (GPa) 15 16 15
Fracture toughness (MPa*m1/2) 5~7 6~8 6~7
Maximum working temperature (℃) 1100 1300 1100
Thermal conductivity (W/m*K) 20 25 80~100
Thermal expansion coefficient (/℃) 3*10-6 3.1*10-6 3*10-6
Thermal shock resistance (ΔT ℃) 550 800 /

 

High Strength Silicon Nitride Substrate Specifications

Type 1: Rectangular High Strength Silicon Nitride Substrate

Si3N4 Substrate in EV Inverter Application

Rectangular Silicon Nitride Substrate
Item No. Length(mm) Width (mm) Thickness (mm)
AT-DHG-JB001 10 10 0.32
AT-DHG-JB002 20 20 0.32
AT-DHG-JB003 30 30 4.0 
AT-DHG-JB004 40 40 0.5
AT-DHG-JB005 50 50 0.32
AT-DHG-JB006 50 50 0.635
AT-DHG-JB007 50 50 1.0 
AT-DHG-JB008 50 50 2.0 
AT-DHG-JB009 50 50 4.0 
AT-DHG-JB010 50 50 9.0 
AT-DHG-JB011 100 100 0.32
AT-DHG-JB012 100 100 0.5
AT-DHG-JB013 100 100 0.635
AT-DHG-JB014 100 100 1.0 
AT-DHG-JB015 100 100 4.0 
AT-DHG-JB016 100 100 9.0 
AT-DHG-JB017 114 114 0.32
AT-DHG-JB018 114 114 0.5
AT-DHG-JB019 114 114 0.635
AT-DHG-JB020 114 114 1.0 
AT-DHG-JB021 190 138 0.32
AT-DHG-JB022 190 138 0.5
AT-DHG-JB023 190 138 0.635
AT-DHG-JB024 190 138 1.0 

 

Type 2: Round High Strength Silicon Nitride Substrate

Metallized Si3N4 Substrate

Round Silicon Nitride Substrate
Item No. Diameter(mm) Thickness (mm)
AT-DHG-JB025 5 0.25
AT-DHG-JB026 5 0.32
AT-DHG-JB027 5 0.625
AT-DHG-JB028 5 1
AT-DHG-JB029 10 0.25
AT-DHG-JB030 10 0.32
AT-DHG-JB031 10 0.625
AT-DHG-JB032 10 1
AT-DHG-JB033 20 0.25
AT-DHG-JB034 20 0.32
AT-DHG-JB035 20 0.625
AT-DHG-JB036 20 1
AT-DHG-JB037 40 0.25
AT-DHG-JB038 40 0.32
AT-DHG-JB039 40 0.625
AT-DHG-JB040 40 1
AT-DHG-JB041 50 0.25
AT-DHG-JB042 50 0.32
AT-DHG-JB043 50 0.625
AT-DHG-JB044 50 1
AT-DHG-JB045 100 0.32
AT-DHG-JB046 100 1
AT-DHG-JB047 100 2
AT-DHG-JB048 150 0.32
AT-DHG-JB049 150 1
AT-DHG-JB050 150 2
AT-DHG-JB051 150 20

 

High Strength Silicon Nitride Substrate Packaging

  • Each substrate is sealed in anti-static film
  • Packed in foam-lined hard cartons to prevent breakage

High Strength Silicon Nitride Substrate Packaging

High Strength Si3N4 Substrate Applications

  • Power Electronics: IGBT/ SiC Modules

    ✅Key Advantages

    1. Low warpage under copper load: planarity held to drawing after solder cycles (reflow 245–260 °C window).
    2. Dielectric withstand headroom: typical ≥15 kV/mm per IEC 60243-1 supports isolation design margins.
    3. Thermal pathway consistency: 70–90 W/m·K helps stabilize junction-to-case targets.

    ✅ Problem Solved

    An industrial-drive module program reported assembly rejects from bow/tilt in final soldering. After switching to Si₃N₄ DBC with defined flatness targets and Ra control, first-pass assembly yield rose by ~4.8% over three pilot lots, and rework time fell by ~22%. Thermal cycling (-40↔125 °C, 1000 cycles) passed without delamination under the customer’s internal protocol.

  • Automotive Inverter/e-Powertrain

    ✅Key Advantages

    1. Thermal shock tolerance: Si₃N₄ resists crack propagation during on-vehicle thermal ramps.
    2. CTE compatibility with Cu: reduced stress compared with more brittle ceramics in thick-Cu builds.
    3. Finish options for bonding: Ni/Au or Ag support wire bond and solder attach in mixed processes.

    ✅ Problem Solved

    A 2-in-1 inverter platform faced die-attach voiding and intermittent bond lift. With Si₃N₄ DBC and a revised surface finish, bond pull variability narrowed by ~15%, and voiding fell below the line’s 5% threshold across three validation runs.

  • High-Power LED/RF Packaging

    ✅Key Advantages

    1. Stable dielectric response: consistent substrate behavior improves RF and optical assemblies.
    2. Smooth, controlled Ra: supports paste print and wetting uniformity.
    3. Thin formats (≤0.3–0.5 mm): enable compact thermal paths in small outlines.

    ✅ Problem Solved

    An LED engine needed higher lumen maintenance at elevated drive currents. Moving to thin Si₃N₄ with tighter Ra reduced paste thickness scatter; junction temperature dropped by ~3–5 °C at the same current, improving long-run stability.

High Strength Silicon Nitride Substrate Usage Instructions

  • Installation & Handling

    1. Inspect substrates for flatness, surface defects, or edge chipping before mounting; measure critical thickness or Ra values at specified datum points if required by process control.
    2. Use vacuum tweezers or soft-tipped ceramic tools when handling; avoid metal tweezers to prevent micro-cracks along the edges.
    3. For AMB/DBC parts, keep copper surface free of oxidation — unpack only before screen printing, soldering, or bonding.

  • Assembly & Operation

    1. Solder/Die attach process:
    a. Follow reflow profile within agreed ramp-up rates (<3 °C/s recommended) to prevent thermal shock.
    b. Maintain uniform paste thickness or solder preform pressure to avoid voiding and uneven wetting.

    2. Wire bonding/Ni/Au surfaces:
    a. Clean surface with dry nitrogen or ion-free wipes; control ultrasonic energy to avoid surface dents.
    b. Aluminum or gold wires should be bonded after verifying finish thickness and hardness.

    3. Power cycling:
    a. Ensure even copper distribution to limit stress concentration.
    b. Substrate must be supported by a flat heat sink or fixture to minimize bending loads during operation.

  • Storage & Shelf Life

    1. Store in original vacuum-sealed antistatic bags; recommended environment 15–25 °C, RH <60%.
    2. Avoid stacking heavy components directly on substrates; store horizontally in plastic or foam trays.
    3. Copper-clad or Ag/Ni-Au finished substrates should be processed within 6–12 months to minimize oxidation and bonding quality loss.

  • Cleaning & Maintenance

    1. For bare Si₃N₄ surfaces: use ion-free water or ethanol-based cleaning; avoid abrasive pads to protect Ra tolerance.
    2. For Ni/Au or Ag surfaces: use lint-free cloth with filtered IPA; do not use alkaline detergents, acids, or ultrasonic cleaning unless verified on samples.
    3. Dry with nitrogen or filtered hot air (≤80 °C) to prevent watermarks or ionic contamination before soldering or bonding.

  • Common Misuse & Solutions

    Issue Cause Recommended Action
    Warpage after solder reflow Asymmetric copper layout, rapid cooling Use symmetric stack-up, control cooling <4 °C/s, use fixture support
    Poor solder wetting Oxidized copper/Ni-Au, high Ra or contamination Micro-clean surface, adjust flux, verify finish age
    Crack or edge chipping Metal tweezers, uneven clamping Use soft fixtures, avoid point loads, and apply even clamp pressure
    Bond lift or delamination Under-thickness Au/Ni, over-ultrasonic power Check metallization report, optimize the bonding profile
    Ionic residue or dendrite growth Improper cleaning/flux residue Rinse and bake post-solder, verify ionic contamination level

High Strength Silicon Nitride (Si3N4) Substrate FAQ

  1. Q: What is a high strength silicon nitride substrate used for in power modules?
    A: A high strength silicon nitride substrate provides an electrically insulating yet thermally conductive base for IGBT or SiC power chips, allowing copper metallization while preventing short circuits between the device and the heat sink.
  2. Q: How does high strength silicon nitride substrate compare to AlN and alumina in reliability?
    A: Compared with Al₂O₃ and AlN, Si₃N₄ offers higher fracture toughness (6–7 MPa·m½) and better thermal shock resistance, making it less prone to cracking or warping during soldering and −40 to 150 °C power cycling.
  3. Q: What is the dielectric strength of silicon nitride substrate?
    A: Si₃N₄ substrates achieve ≥15 kV/mm dielectric breakdown values measured per IEC 60243-1, supporting high isolation requirements in automotive inverters, high-voltage DC links, and industrial drives.
  4. Q: Can high strength silicon nitride substrates be used with both AMB and DBC copper technologies?
    A: Yes. Si₃N₄ is compatible with both Active Metal Brazing (AMB) and Direct Bonded Copper (DBC). AMB is preferred for thick copper (>0.4 mm), while DBC is often used for standard copper thickness with tighter pattern precision.
  5. Q: What flatness or warpage tolerance is achievable on a high strength silicon nitride substrate?
    A: For a 100 × 100 mm substrate, post-processing flatness can be controlled to ≤30–50 µm, depending on copper thickness and symmetry. Larger panels may require jig support or symmetrical Cu layout to maintain planarity.

  6. Q: What are the most important drawing specifications I must provide for a custom high strength silicon nitride substrate?
    A: Key specifications include substrate size, thickness tolerance, flatness/warp limit, copper thickness and pattern (if AMB/DBC), surface roughness (Ra), metallization finish (Ni/Au, Ag), test voltage, and reference datum position.
  7. Q: How does high strength silicon nitride substrate handle thermal cycling in SiC or IGBT modules?
    A: Due to low CTE mismatch with copper and high fracture toughness, Si₃N₄ substrates can endure 1000+ thermal cycles (−40 / 150 °C) without delamination, provided copper thickness and solder profiles are symmetric.

High Strength Silicon Nitride Substrate Reviews

  • ⭐️⭐️⭐️⭐️
    We qualified a high strength silicon nitride AMB substrate for an industrial inverter. Flatness and Ra met the print, and bond variability tightened enough to release the line.
    -- Marco Ruiz, Packaging Engineer, VoltEdge Drives (Spain)
  • ⭐️⭐️⭐️⭐️⭐️
    ADCERAX responded with drawing feedback and high strength Si₃N₄ substrate samples in our thickness range. Pricing was competitive for pilot lots and consistent on the ramp
    -- Grace Lin, Sourcing Manager, Aurora Motion Systems (USA)
  • ⭐️⭐️⭐️⭐️⭐️
    On the high strength silicon nitride substrate with Ag finish, solder wetting was stable after storage. Lot-to-lot thickness variation was within our map limits.
    -- Kenji Yamamoto, Module Designer, Kenso Electronics (Japan)
  • ⭐️⭐️⭐️⭐️⭐️
    Custom copper pattern and high strength Si₃N₄ substrate planarity enabled us to keep rework down during thermal cycling. We continued to volume PO after three builds.
    -- Oliver Becker, COO, Rhein Power Devices (Germany)
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Customize High Strength Silicon Nitride Substrate

Our silicon nitride substrates can be manufactured and post-processed according to customer drawings, suitable for AMB, DBC, and metallization workflows. What you can specify:

1. Dimensions & Thickness
– Panel or piece size to drawing (rectangular, square, special outline)
– Thickness range: 0.25–0.80 mm commonly used; other values available
– Thickness tolerance achievable: ±0.03 mm for small pieces, ±0.05 mm for full panels

2. Flatness / Warpage Control
– Define max. bow/warp per panel or per individual substrate
– Typical control range: ≤30–50 µm across 100×100 mm, measured on the designated datum plane
– Support for high-copper-load AMB/DBC structures to maintain flatness after brazing

3. Edge & Geometry Features
– Chamfered or radiused edges, deburring, fiducial marks, notch or pin marks
– Alignment holes, vent/relief slots, bevels for stress reduction
– Edge chamfer angle or radius can be specified (e.g., 0.2–0.5 mm)

4. Cutting & Profiling Options
– Laser cutting for outline, vias, cavities, or narrow slot features
– Singulation strategy: full cut, half-cut, tab routing or break-out tabs
– Control of the heat-affected zone and micro-crack limits upon request

5. Copper & Metallization (for AMB/DBC Types)
– Copper thickness: for example 0.3 mm /0.4 mm /0.6 mm or custom
– Copper pattern, isolation gap width, conductor width, and alignment tolerance
– Requests for plated-through vias or via-land preparation can be reviewed

6. Surface Finish Requirements
– Bare ceramic: lapped, fine-ground or polished; Ra commonly 0.2–0.8 µm
– Copper surface: raw copper, Ni/Au (ENIG type), Ag finish for bonding or solder paste
– Define coating thickness (e.g., Ni 3–7 µm + Au 0.05–0.1 µm or Ag 5–10 µm)

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